[Quantum-ms] [EE Seminar 8/7]: The Evolution of Processing Units: From CPU and GPU to NPU and QPU

[Columbia EE Events]

*Date: *Thursday, Aug. 7
*Time:* 11:00am - 12:00pm
*Location:* EE conference room, 13th Floor
*Seminar:* The Evolution of Processing Units: From CPU and GPU to NPU and
QPU
*Host:* Mingoo Seok



*Abstract: *

In the ever-changing world of computer systems and architecture, processing
units remain at the heart of technological progress. This talk takes a
broad look at processing units—past, present, and future. We’ll begin by
exploring the history and key role of Central Processing Units (CPUs) in
advancing computing power and system design. Next, we’ll look at the rise
of Graphics Processing Units (GPUs) and how they’ve transformed parallel
computing and enabled today’s AI applications. As we explore the current
landscape of processing technologies, the talk will highlight recent
advancements that are pushing the limits of modern computing. This includes
new architectures like Neural Processing Units (NPUs) and other specialized
accelerators that improve performance and energy efficiency. We’ll also
cover game-changing ideas like Processing-In-Memory (PIM) and in-storage
computing, which move computation closer to where data lives. Finally, the
talk will look ahead to what’s next—featuring breakthroughs in quantum
computing and the rise of Quantum Processing Units (QPUs), which could
shape the future of computing in entirely new ways.



*Bio: *

Won Woo Ro received his B.S. degree in Electrical Engineering from Yonsei
University, Seoul, Korea, in 1996, and his M.S. and Ph.D. degrees in
Electrical Engineering from the University of Southern California in 1999
and 2004, respectively. He previously worked as a Research Scientist in the
Department of Electrical Engineering and Computer Science at the University
of California, Irvine.  He is currently a Professor in the School of
Electrical and Electronic Engineering at Yonsei University. Prior to
joining Yonsei, he served as an Assistant Professor in the Department of
Electrical and Computer Engineering at California State University,
Northridge. His industry experience includes a college internship at Apple
Inc. and a role as a contract software engineer at ARM Inc.  His research
interests span high-performance microprocessor design, GPU
microarchitectures, neural network accelerators, memory hierarchy design,
and quantum computing. He is serving as the General Chair for IEEE MICRO
2025 and has been inducted into the ISCA and MICRO Hall of Fame.
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